The present invention relates to a memory and a microcomputer including the memory; and more especially, the invention relates to a composition of the memory and the microcomputer in which the amount of current dissipation is reduced.
Generally, in the case where a processor using a memory has a high-speed processing mode and a low-speed processing mode, a memory having a high-speed access operation is used to accommodate the high-speed processing mode of the microcomputer. That is, even if the microcomputer operates in the low-speed processing mode, the memory maintains its maximum operational speed. Therefore, the conventional memory works at its maximum operational speed and consumes a current proportional to the number of switching operations performed in the memory, even when it is possible for the memory to operate at a lower operational speed. This operational feature of the memory impedes a reduction of current dissipated in the memory or the processor using it.
Although a single chip microcomputer capable of operating in either a high-speed processing mode or a low-speed processing mode is disclosed in JP-A-259986/1994, its mode changing method is different from the present invention, and it does not have the ability to directly control the memory access speed of its memory.